148 asic design engineer job offers in state of Karnataka
126-148 of 148 jobs
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Staff Engineer, Asic Development Engineering Rtl Design...
sandisk Bangalore, Karnataka
...you will develop RTL for IPs and own it. Dealing the best of class IPs for all Sandisk products. Hands on experience in IP / blocks / subsystem complex design...
6 days ago in Kitjob_inReport -
SeniorPrincipal ASIC RTL Design Engineer (SoC/Subsystem...
new Proxelera Bangalore, Karnataka
...their years of high quality experience to make your product successful. We understand the challenges of all aspects of product engineering – right from design...
1 day ago in Kitjob_inReport -
Senior Lead ASIC/IP/SOC RTL Design Engineer (Bengaluru)
MosChip® Bangalore, Karnataka
...prevent bad`ifdef usage, naming conventions (extend spyglass or add our own), etc. Creating design build configurations for different modes like ATPG, HWEMUL
4 days ago in Kitjob_inReport -
Staff Engineer, ASIC Development Engineering (RTL Design...
sandisk Bangalore, Karnataka
...you will develop RTL for IPs and own it. Dealing the best of class IPs for all Sandisk products. Hands on experience in IP / blocks / subsystem complex design...
6 days ago in Kitjob_inReport -
Principal Engineer, ASIC Development Engineering (IO and...
sandisk Bangalore, Karnataka
Job Description Principal Engineer will contribute to the design and development of IO and high‑speed interface solutions for next‑generation SoCs in...
4 days ago in Kitjob_inReport -
Principal Engineer, Asic Development Engineering Rtl Design...
sandisk Bangalore, Karnataka
Job Description About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System-on-Chip (SoC)...
4 days ago in Kitjob_inReport -
Ip Design Technical Lead/ Staff Asic Rtl Design Engineer...
Synopsys Karnataka, Karnataka
Job Title IP Design Technical Lead Staff ASIC RTL Design Engineer We Are At Synopsys we drive the innovations that shape the way we live and connect Our...
7 days ago in Kitjob_inReport -
Staff Engineer, Asic Development Engineering Physical...
sandisk Bangalore, Karnataka
Job Description Position Overview: We are seeking a highly skilled and experienced Senior Engineer for our PNR function. The successful candidate will be...
6 days ago in Kitjob_inReport -
Staff Engineer, Asic Development Engineering Fpga Rtl...
Western Digital Bangalore, Karnataka
Job Description The FPGA design team, part of the (VHS) group is responsible for developing a wide range of FPGA solutions for post-silicon validation of...
4 days ago in Kitjob_inReport -
Staff Engineer, ASIC Development Engineering (FPGA-RTL...
Western Digital Bangalore, Karnataka
Job Description. The FPGA design team, part of the (VHS) group is responsible for developing a wide range of FPGA solutions for post-silicon validation of...
5 days ago in Kitjob_inReport -
Principal Engineer, ASIC Development Engineering (IO and...
sandisk Bangalore, Karnataka
...enabling reliable data storage, seamless access, and significant value creation from the information they manage. *Job Description*. Principal Engineer...
4 days ago in Kitjob_inReport -
Staff Engineer, ASIC Development Engineering (FPGA-RTL...
sandisk Bangalore, Karnataka
Job Description. The FPGA design team, part of the (VHS) group is responsible for developing a wide range of FPGA solutions for post-silicon validation of...
4 days ago in Kitjob_inReport -
Principal Engineer, ASIC Development Engineering (RTL...
Western Digital Bangalore, Karnataka
About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System-on-Chip (SoC) solutions. As a...
5 days ago in Kitjob_inReport -
Principal Engineer, Asic Development Engineering Rtl Design...
Western Digital Bangalore, Karnataka
About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System-on-Chip (SoC) solutions. As a...
4 days ago in Kitjob_inReport -
Staff Engineer, ASIC Development Engineering (FPGA-RTL...
sandisk Bangalore, Karnataka
...design-space exploration is a strong plus. Familiarity with ML-based test generation, pattern prediction, or EDA tool automation preferred. Ability to...
4 days ago in Kitjob_inReport -
Staff Engineer, Asic Development Engineering (fpga-rtl...
sandisk Karnataka, Karnataka
...design-space exploration is a strong plus Familiarity with ML-based test generation pattern prediction or EDA tool automation preferred Ability to integrate...
6 days ago in Kitjob_inReport -
Technologist, Asic Development Engineering Design Lead High...
sandisk Bangalore, Karnataka
...planning and mentoring junior engineers. Propose cutting-edge design solutions and design methodologies. Help in building a team and developing processes.
4 days ago in Kitjob_inReport -
Technologist, ASIC Development Engineering (Design Lead...
sandisk Bangalore, Karnataka
...planning and mentoring junior engineers. Propose innovative design solutions and design methodologies. Help in building a team and developing processes.
5 days ago in Kitjob_inReport -
Asic Physical Design And Sta Senior/Lead/Staff (Bengaluru)
Stealth Startup - Semiconductor Bangalore, Karnataka
...ICVStrong Research skills for problem-solving and design optimizationAnalytical skills with attention to detail and an ability to adhere to project timelines
4 days ago in Kitjob_inReport -
ASIC SOC RTL Design Lead (Micro-architecture) (Bengaluru)
Eximietas Design Bangalore, Karnataka
...feel free to forward this within your network. Best regards, Maruthy Prasaad Associate VLSI Manager. Talent Acquisition | Visakhapatnam Eximietas Design.
6 days ago in Kitjob_inReport -
ASIC SOC RTL Design Lead (Micro-architecture) (Bengaluru)
new Eximietas Design Bangalore, Karnataka
...feel free to forward this within your network. Best regards, Maruthy Prasaad Associate VLSI Manager. Talent Acquisition | Visakhapatnam Eximietas Design.
1 day ago in Kitjob_inReport -
ASIC Physical Design and STA Senior/Lead/Staff (Bengaluru)
Stealth Startup - Semiconductor Bangalore, Karnataka
I'm hiring for skilled VLSI engineers from 3-10 years experience in the following domains: Synthesis. Physical Design. Sta. Physical Verification Salary...
2 days ago in Kitjob_inReport -
Technologist, ASIC Development Engineering (Design Lead...
sandisk Bangalore, Karnataka
...design such as DDR/HBM/UCIe PHY will be of advantage. Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim...
4 days ago in Kitjob_inReport
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