Chip design job offers in gujarat
1-25 of 104 jobs
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- Last day 21
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Synthesis and Static Timing Analysis - Staff Design...
new Eteros Technologies Surat, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
14 h 52 minutes ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
new Eteros Technologies Bhavnagar, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
15 h 5 minutes ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Jamnagar, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
3 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Nadiad, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Talent.comReport -
ThermoFisher Scientific Hiring For Area Sales Manager - Mole
Thermofisher Ahmedabad, Gujarat
...chip in to overall performance of the Division. Should be having good market knowledge in Pharmaceutical industry. Minimum Qualifications / Skills...
30+ days ago in sarkariresults360Report -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Ahmedabad, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Vadodara, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
5 days ago in Talent.comReport -
Design Engineer
VeriFast Technologies Ahmedabad, Gujarat
Key Responsibilities: Design and develop RTL for ASIC/FPGA systems using Verilog and VHDL Define and implement Micro-Architecture specifications based on...
12 days ago in Talent.comReport -
Machine Learning Engineer
new Fermions Bhavnagar, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 38 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Gandhinagar, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 38 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Ahmedabad, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 41 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Junagadh, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 42 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Jamnagar, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 46 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Surat, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 47 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Nadiad, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 49 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Anand, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 52 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Rajkot, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 53 minutes ago in Talent.comReport -
Machine Learning Engineer
new Fermions Vadodara, Gujarat +79 locations
About Us At Fermions, we are building SAiGE, an AI-powered semiconductor design and verification platform that redefines how digital chips are designed. The...
20 h 54 minutes ago in Talent.comReport -
Engineer - Wafer Electrical & Sort Test
Tata Electronics Dholera, Gujarat
...transfer partners. Drive process improvements, test time reduction, and debug algorithm efficiency. Coordinate with integration and customer teams on test chip...
5 days ago in Talent.comReport -
Head – Wafer Electrical & Sort Test
Tata Electronics Dholera, Gujarat
...Engineering teams. Drive process improvements, test time reduction, and debug algorithm efficiency. Coordinate with integration and customer teams on test chip...
3 days ago in Talent.comReport -
AumRaj Design Systems - RTL/FPGA Design Engineer
AumRaj Design Systems Ahmedabad, Gujarat
RTL/FPGA Design Engineer(Experienced). Exp: Min 3.7 Years of Experience Job Description & Responsibilities: RTL programming (Verilog/System Verilog or VHDL)...
18 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Junagadh, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
9 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Rajkot, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
13 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Gandhinagar, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
15 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Anand, Gujarat +79 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
18 days ago in Talent.comReport
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