546 design engineer job offers in state of Kerala
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[SWJ-535] Principal Physical Design Engineer (Low Power PD...
Aion Silicon Thrissur, Kerala +18 locations
...domain DVFS Memory sleep/LP modes & control thereof Other power-vs-performance techniques (eg. Active body biasing) Low-power design UPF development (including
2 days ago in Kitjob_inReport -
(G-320) Principal Physical Design Engineer (Low Power PD...
Aion Silicon Kochi, Kerala +9 locations
...domain DVFS Memory sleep/LP modes & control thereof Other power-vs-performance techniques (eg. Active body biasing) Low-power design UPF development (including
2 days ago in Kitjob_inReport -
KX-580 - Principal Physical Design Engineer (Low Power PD...
Aion Silicon Kozhikode, Kerala +17 locations
...domain DVFS Memory sleep/LP modes & control thereof Other power-vs-performance techniques (eg. Active body biasing) Low-power design UPF development (including
2 days ago in Kitjob_inReport -
ML-585 | Principal Physical Design Engineer (Low Power PD...
Aion Silicon Malappuram, Kerala +17 locations
...domain DVFS Memory sleep/LP modes & control thereof Other power-vs-performance techniques (eg. Active body biasing) Low-power design UPF development (including
2 days ago in Kitjob_inReport -
[N-961] Principal Physical Design Engineer (Low Power PD...
Aion Silicon Kozhikode, Kerala +18 locations
We are currently recruiting for a Principal Physical Design Engineer who is an expert in Low Power Design. This role will be based in the office in either...
2 days ago in Kitjob_inReport -
(AQ306) Opening for design verification engineer with...
new UST Thrissur, Kerala +1 Location
Hi, We have an opening for DV. Design Verification with UVM, SV, and Ethernet, 40 GB+ work location – Hyderabad/Bangalore. Please share your resume Regards...
1 day ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Kochi, Kerala +21 locations
5-7 years of experience in design verification for ASICs or SoCs. Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Trivandrum, Kerala +21 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
SOC Design Verification Engineer (Onsite in Malaysia...
Abhidi Solution Kottayam, Kerala +9 locations
...SV/UVM Knowledge. KEY RESPONSIBILITIES: IOHUB Subsystem test plan creation, DRVR implementation and verification closure. Closely work with Design/Architecture...
2 days ago in Kitjob_inReport -
SOC Design Verification Engineer (Onsite in Malaysia...
Abhidi Solution Malappuram, Kerala +9 locations
...SV/UVM Knowledge. KEY RESPONSIBILITIES: IOHUB Subsystem test plan creation, DRVR implementation and verification closure. Closely work with Design/Architecture...
2 days ago in Kitjob_inReport -
(T-648) | 6+yr Senior design verification engineer - 7th...
HCLTech Thrissur, Kerala +7 locations
5-7 years of experience in design verification for ASICs or SoCs. Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
(Z-199) - SOC Design Verification Engineer (Onsite in...
Abhidi Solution Alappuzha, Kerala +4 locations
...SV/UVM Knowledge. KEY RESPONSIBILITIES: IOHUB Subsystem test plan creation, DRVR implementation and verification closure. Closely work with Design/Architecture...
2 days ago in Kitjob_inReport -
L-713 | Pharmaceutical Facility CAD Design Specialist
new Recognized Kozhikode, Kerala
...The selected candidate will be responsible for creating accurate technical drawings, architectural layouts, and engineering schematics for building design...
1 day ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Trivandrum, Kerala +11 locations
5-7 years of experience in design verification for ASICs or SoCs. Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Malappuram, Kerala +22 locations
5-7 years of experience in design verification for ASICs or SoCs. Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Palakkad, Kerala +21 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Kochi, Kerala +11 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
6+yr Senior design verification engineer - 7th June VIRTUAL...
HCLTech Kozhikode, Kerala +22 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
(O-954) 6+yr Senior design verification engineer - 7th June...
HCLTech Kottayam, Kerala +28 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
OJO-596 - 6+yr Senior design verification engineer - 7th...
HCLTech Kannur, Kerala +28 locations
5-7 years of experience in design verification for ASICs or SoCs Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport -
[NJ-819] - 6+yr Senior design verification engineer - 7th...
HCLTech Thrissur, Kerala +28 locations
5-7 years of experience in design verification for ASICs or SoCs. Strong understanding of digital design principles (combinational logic, sequential logic)...
2 days ago in Kitjob_inReport
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