Dft engineer job offers in kochi, kerala
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Lead DFT Engineer
ACL Digital Kochi, Kerala +77 locations
Job Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We...
7 days ago in Talent.comReport -
Test Engineer
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
9 h 17 minutes ago in Talent.comReport -
Asic rtl engineer
new Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
1 day ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
new Eteros Technologies Kochi, Kerala +77 locations
...Engineer, you will be a part of the SOC digital design team responsible for providing integrated solutions into a growth industry Key Qualifications The...
1 day ago in Talent.comReport -
Physical Design Engineer
HCLTech Ernakulam, Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
25 days ago in AdzunaReport -
Design Verification Engineer
HCLTech Kochi, Kerala
...and/or SoC-level verification. Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments. Collaborate with RTL, DFT...
22 days ago in Talent.comReport -
Test Engineer | (M714)
HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
4 days ago in Kitjob_inReport -
ITY-259 Test Engineer
HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
4 days ago in Kitjob_inReport -
[VW823] Test Engineer
HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
3 days ago in Kitjob_inReport -
NX590 | Test Engineer
HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
2 days ago in Kitjob_inReport -
YYM-121 | Test Engineer
HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
2 days ago in Kitjob_inReport -
[BT844] Test Engineer
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
1 day ago in Kitjob_inReport -
Test Engineer | FDM46
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
1 day ago in Kitjob_inReport -
[V622] Test Engineer
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
1 day ago in Kitjob_inReport -
Physical Design Engineer FR686
HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
4 days ago in Kitjob_inReport -
(U066) | Physical Design Engineer
HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
3 days ago in Kitjob_inReport -
Physical Design Engineer | (VA646)
HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
4 days ago in Kitjob_inReport -
Design Verification Engineer [RGI735]
HCLTech Kochi, Kerala
...and/or SoC-level verification. Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments. Collaborate with RTL, DFT...
3 days ago in Kitjob_inReport -
Design Verification Engineer | KV318
HCLTech Kochi, Kerala
...and/or SoC-level verification. Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments. Collaborate with RTL, DFT...
3 days ago in Kitjob_inReport -
Hardware design engineer | (dgl252)
Z-Crossing Solutions Kochi, Kerala
Experience – 3 to 5 years JOB DESCRIPTION We are seeking a detail-oriented hardware design engineer for our company. As a hardware design engineer, you will...
3 days ago in Kitjob_inReport -
ASIC RTL Engineer | [N412]
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
3 days ago in Kitjob_inReport -
(IR371) asic rtl engineer
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
2 days ago in Kitjob_inReport -
ASIC RTL Engineer - [KKQ878]
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
3 days ago in Kitjob_inReport -
ASIC RTL Engineer | [PLZ697]
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
4 days ago in Kitjob_inReport -
C288 ASIC RTL Engineer
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
2 days ago in Kitjob_inReport
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