Dft engineer job offers in kochi, kerala
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DFT Engineer
Platlap Solutions Kochi, Kerala +4 locations
Role Overview: As a DFT Engineer, you will be responsible for ensuring the testability of ASIC designs by implementing and verifying Design for Testability...
8 days ago in Talent.comReport -
DFT Engineer - Complex SOC Designs
new Leading USA based Chip Design Company - India Center Kochi, Kerala +79 locations
Sr DFT Engineers and Managers. Location remote any where in India Job Summary Our clients Arasan Chip Systems (based in US are seeking for their India...
1 day ago in Talent.comReport -
Lead DFT Engineer
ACL Digital Kochi, Kerala +78 locations
Job Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We...
14 days ago in Talent.comReport -
Senior DFT Engineer - ASIC Design
Bharat Head Hunters Kochi, Kerala +3 locations
Job Opening: Senior DFT Engineer (ASIC) Experience: 7+ Years Location: Bangalore Domain: ASIC / Semiconductor Job Type: the Role: We are seeking a highly...
10 days ago in Talent.comReport -
Test Engineer
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
13 h 26 minutes ago in Talent.comReport -
Physical Design Engineer
new HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
13 h 27 minutes ago in Talent.comReport -
Design Verification Engineer
new HCLTech Kochi, Kerala
...and/or SoC-level verification. Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments. Collaborate with RTL, DFT...
13 h 22 minutes ago in Talent.comReport -
Asic rtl engineer
new Wipro Kochi, Kerala +1 Location
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
13 h 30 minutes ago in Talent.comReport -
Physical Design Engineer
Platlap Solutions Kochi, Kerala +4 locations
Role Overview: As a Physical Design Engineer, you will be responsible for implementing and optimizing the physical layout of digital blocks and full-chip...
4 days ago in Talent.comReport -
ASIC/RTL Engineer - System Verilog
new Platlap Solutions Kochi, Kerala +4 locations
Role Overview: As an ASIC RTL Engineer, you will be responsible for the design and development of complex digital logic for SoCs, focusing on RTL coding, IP...
18 h 29 minutes ago in Talent.comReport -
Design Verification Engineer - ASIC/SoC
new Platlap Solutions Kochi, Kerala +4 locations
As a Design Verification Engineer, you will be responsible for verifying complex digital designs, ensuring they meet functional and performance requirements...
1 day ago in Talent.comReport -
Senior ASIC RTL Design Engineer
7HILLSTS Kochi, Kerala +2 locations
Role Overview: We are seeking an experienced Senior ASIC RTL Design Engineer to join our dynamic team. The ideal candidate will have a deep understanding of...
10 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Kochi, Kerala +79 locations
...Engineer, you will be a part of the SOC digital design team responsible for providing integrated solutions into a growth industry Key Qualifications The...
7 days ago in Talent.comReport -
Physical Design Lead - SoC/ASIC
Bharat Head Hunters Kochi, Kerala +1 Location
...advanced technology requirements (28nm and below). Optimize design for performance, power, and area (PPA). Collaborate with cross-functional teams (RTL, DFT...
10 days ago in Talent.comReport -
DV032 | Lead DFT Engineer
ACL Digital Kochi, Kerala
Job Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We...
2 days ago in Kitjob_inReport -
(A567) | Test Engineer
new HCLTech Kochi, Kerala
Key Responsibilities: Define and implement DFT architecture for SoCs and IPs. Develop and integrate scan chains, ATPG, MBIST, LBIST, and boundary scan (JTAG)...
1 day ago in Kitjob_inReport -
Physical Design Engineer - IW687
HCLTech Kochi, Kerala
...DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus. Required Skill Profession Other...
3 days ago in Kitjob_inReport -
[VOW811] Physical Design Engineer
HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
4 days ago in Kitjob_inReport -
Asic rtl engineer | (CJ675)
new Wipro Kochi, Kerala
Requirement Name: ASIC RTL / So C RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead...
1 day ago in Kitjob_inReport -
Physical Design Engineer JD-915
HCLTech Kochi, Kerala
...Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.
4 days ago in Kitjob_inReport -
Hardware design - senior engineer kq340
Z-Crossing Solutions Kochi, Kerala
Experience – 5+ years JOB DESCRIPTION We are seeking a detail-oriented hardware design engineer for our company. As a hardware design engineer, you will be...
2 days ago in Kitjob_inReport -
[NWG-856] | asic rtl engineer
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
4 days ago in Kitjob_inReport -
[XSD-201] | asic rtl engineer
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
3 days ago in Kitjob_inReport -
DAK-725 - ASIC RTL Engineer
Wipro Kochi, Kerala
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
3 days ago in Kitjob_inReport
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