Ic layout designer job offers in bangalore, karnataka
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Lead Product Designer (IC Role)
Weekday AI Bangalore, Karnataka
...layout, color, and hierarchy. Ability to work independently, prioritize effectively, and manage multiple projects simultaneously. Excellent communication...
Gross/year: ₹ 45 lakhs
2 days ago in Talent.comReport -
RFIC/Analog IC Design- Wireless
Texas Instruments Bangalore, Karnataka
...ADCs, DACs, PLLs, Oscillators, DC-DC converters, LDOs, Bandgaps, Op-Amps, Comparators. Experience with Cadence design tools for analog/mixed-signal IC design
7 days ago in Talent.comReport -
Director of Analog and Mixed-Signal Power IC Design
new Analog Devices Bangalore, Karnataka
About Analog Devices is seeking a Director of IC Design for the High Performance Power (HPP) Business Unit, which deliver state of the art monolithic power...
1 day ago in Talent.comReport -
Senior Mask Designer
new NVIDIA Bangalore, Karnataka
...layout dependent effects including LOD, Dummification, fills etc. We are an equal opportunity employer and value diversity at our company. We do not...
1 day ago in Talent.comReport -
Lead High-Speed Analog IC Designer
Confidential Bangalore, Karnataka
...targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout...
Gross/year: ₹ 9 lakhs
30+ days ago in MonsterReport -
Intel Hiring For Physical Design Soc Lead At Bengaluru, Karn
intel Bangalore, Karnataka
Job Description AXG Silicon Engineering SOC Team is looking for Full Chip Layout/Design Planning Lead Responsibilities includes but not limited to � Drive...
1+ years ago in sarkariresults360Report -
Principal Engineer, Analog Design Engineering
new Analog Devices Indira Nagar, Bangalore, Karnataka
...layout techniques Strong written and verbal communication skills Preferred Qualifications FinFET design experience Proficient in custom digital design...
1 day ago in Talent.comReport -
PMIC Design Lead – Custom BU
Texas Instruments Bangalore, Karnataka
...layout including gate drivers, control loops, fault systems and power Fets. Competency in the analysis, transistor level design and system implementation of...
7 days ago in Talent.comReport -
Lead High-Speed Analog IC Designer
Confidential Bangalore, Karnataka
...layout to minimize the effect of parasitics, device stress, and process variation, Present simulation data for peer and customer review, Document design...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
Director of Analog and Mixed-Signal Power IC Design
Confidential Bangalore, Karnataka
Lead and grow a cross-functional IC design team (analog, digital, verification, layout) in Bangalore. Drive execution excellence across all development...
Gross/year: ₹ 15 lakhs
30+ days ago in MonsterReport -
Senior Mask Designer
Confidential Bangalore, Karnataka
...layout dependent effects including LOD, Dummification, fills etc. We are an equal opportunity employer and value diversity at our company. We do not...
Gross/year: ₹ 8 lakhs
30+ days ago in MonsterReport -
SanDisk Hiring For Technologist, ASIC Development...
sandisk Bangalore, Karnataka
...effects. Aware of layout techniques to mitigate ESD, latch-up issues. Holds advanced knowledge of CMOS and FinFET technologies and their impact on design
30+ days ago in sarkariresults360Report -
Y-633 | Technologist, ASIC Development Engineering
sandisk Bangalore, Karnataka
Job Description We are looking for technically sound and highly skilled High-speed SERDES IO PHY Layout designer with 12-15 years of experience. Apart from...
5 days ago in Kitjob_inReport -
(RIH856) | Technologist, ASIC Development Engineering
sandisk Bangalore, Karnataka
Job Description We are looking for technically sound and highly skilled High-speed SERDES IO PHY Layout designer with 12-15 years of experience. Apart from...
3 days ago in Kitjob_inReport -
(L149) Technologist, ASIC Development Engineering
sandisk Bangalore, Karnataka
...including circuit performance and parasitic effects. Aware of layout techniques to mitigate ESD, latch-up issues. Holds advanced knowledge of CMOS and FinFET
4 days ago in Kitjob_inReport -
[L255] | Technologist, ASIC Development Engineering
sandisk Bangalore, Karnataka
...including circuit performance and parasitic effects. Aware of layout techniques to mitigate ESD, latch-up issues. Holds advanced knowledge of CMOS and FinFET
2 days ago in Kitjob_inReport -
PMIC Design Lead – Custom BU [HYT-778]
Texas Instruments Bangalore, Karnataka
...layout including gate drivers, control loops, fault systems and power Fets. Competency in the analysis, transistor level design and system implementation of...
4 days ago in Kitjob_inReport -
PMIC Design Lead – Custom BU | [SO-931]
Texas Instruments Bangalore, Karnataka
...layout including gate drivers, control loops, fault systems and power Fets. Competency in the analysis, transistor level design and system implementation of...
2 days ago in Kitjob_inReport -
PMIC Design Lead - Custom BU (B-319)
Texas Instruments Bangalore, Karnataka
...layout including gate drivers, control loops, fault systems and power Fets. Competency in the analysis, transistor level design and system implementation of...
5 days ago in Kitjob_inReport
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