Perl job offers in hyderabad, telangana
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ASIC Design Engineer
Proxelera Hyderabad, Telangana
...(Perl/Python) and FPGA-based emulation platforms like HAPS or Veloce is highly valued. If you’re looking for meaningful ownership and a chance to influence...
15 days ago in JobrapidoReport -
Staff Engineer- Design Verification
CYIENT Hyderabad, Telangana
...perl or TCL for automation tasks. Able to track & manage Daily and weekly progress and manage a team of 6 to 7 Engineers. Interact with the customer on the...
9 days ago in JobrapidoReport -
RTL Design Engineer
ACL Digital Hyderabad, Telangana
...VC_spyglass LINT, CDC and RDC 0in Formality and conformal LEC tool. Design and scripting languages: Verilog and SV Perl Python TCL Thanks, K Himabindu
30+ days ago in JobrapidoReport -
Sta lead
new ACL Digital Hyderabad, Telangana
...PERL, TCL and EDA tool-specific scripting. DMSA @ full chip and custom scripts for timing fixesQualification: BE/BTECH/MTECH in EE/ECE with proven...
1 day ago in WhatjobsReport -
PD Methodology and Flow Architect
new SmartSoC Solutions Hyderabad, Telangana
...Perl, Python). Ensure consistent and reliable execution across multiple parallel design containers. Uday muday_-------@yahoo.com "Mining the Knowledge...
18 h 1 minute ago in Talent.comReport -
Senior Design Verification Engineer
ACL Digital Hyderabad, Telangana
...in Power Management, Clock, Reset will be an added advantage Experience/Knowledge DPI Interface, Ruby/Perl script programming skills will be an added advantage
30+ days ago in JobrapidoReport -
RTL Design Engineer
ACL Digital Hyderabad, Telangana
...RDC 0in Formality and conformal LEC tool. Design and scripting languages: Verilog and SV Perl Python TCL Interested can share CV to ----------@acldigital.com
30+ days ago in JobrapidoReport -
Dft lead
eInfochips Hyderabad, Telangana +106 locations
...timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations. Expertise in scripting languages such as perl...
22 days ago in JobrapidoReport -
FPGA Design Engineer
ACL Digital Hyderabad, Telangana
...like AMD(XILINX) /Altera. Expertise in digital hardware designing using Verilog on large AMD(Xilinx) /altera FPGAs. Experience in scripting language like perl...
30+ days ago in JobrapidoReport -
DFT Verfication Engineer
new ACL Digital Hyderabad, Telangana +1 Location
...Tcl/Perl/Ruby/PythonWorking knowledge of Unix/Linux OS, file version control. Additional skills: Experience in ATE debug, Synthesis, formal/LEC, or power...
1 day ago in WhatjobsReport -
Subsystem Verification Engineer
new ACL Digital Hyderabad, Telangana
...Digital is Hiring: GPM Subsystem Verification Engineer Must-have: UVM, System Verilog, IP Verification Preferred: Power Management IP, Firmware DV, Python/Perl...
18 h 10 minutes ago in Talent.comReport -
Full Chip Physical Design Lead
eInfochips Hyderabad, Telangana +106 locations
...Perl, Tcl, Awk, or Python Provide technical guidance and leadership to a team of 5–8 engineers Collaborate cross-functionally to ensure consistency between...
30+ days ago in JobrapidoReport -
Dft-mbist engineer
Proxelera Hyderabad, Telangana +1 Location
...Strong RTL (Verilog/SystemVerilog), STA basics, scripting (TCL/Python/Perl). Collaborate with design/PD/ATE teams; excellent communication and documentation
30+ days ago in JobrapidoReport -
Design Verification Engineer
Proxelera Hyderabad, Telangana +1 Location
...code reviews. Strong scripting (Python/Perl/TCL), Make/CMake, version control (Git). Work with architects/design/DFT/PD for spec clarification and sign-off
30+ days ago in JobrapidoReport -
Senior Physical Design Engineer
ACL Digital Hyderabad, Telangana
...Perl, or Python for automating design tasks. Excellent problem-solving skills and attention to detail. Strong communication skills and the ability to...
30+ days ago in JobrapidoReport -
Senior /RTL Lead
new capgemini Hyderabad, Telangana +1 Location
...Perl, Python, Shell, and Tcl. Secondary skills: synopsis/cadence tool flow, arm coretex, dma, ddr, spi, i2c, uart, ahb/axi/apb, ethernet, usb, pcie, mipi...
1 day ago in WhatjobsReport -
Hardware Verification Engineer
ACL Digital Hyderabad, Telangana
...Digital is Hiring: GPM Subsystem Verification Engineer Must-have: UVM, System Verilog, IP Verification Preferred: Power Management IP, Firmware DV, Python/Perl...
2 days ago in Talent.comReport -
Full Chip STA Lead
eInfochips Hyderabad, Telangana +106 locations
...Perl, Tcl, Awk, or Python Mentor and guide junior engineers on technical aspects Requirements: 8+ years of hands-on experience in full-chip STA Proven...
30+ days ago in JobrapidoReport -
Teamcenter Developer
Webologix Ltd/ Hyderabad, Telangana
...Perl, Shell, Python). Experience with PLM-CAD integrations (NX, SolidWorks, CATIA) is a plus. Familiarity with Teamcenter Unified Architecture and Active...
30+ days ago in JobrapidoReport -
Verification Lead
ACL Digital Hyderabad, Telangana
...Perl or Python Hands-on experience with SystemVerilog and UVM is mandatory Experience in developing UVM-based verification testbenches, processes, and flows...
30+ days ago in JobrapidoReport -
Application Specific Integrated Circuit Design Engineer
ACL Digital Hyderabad, Telangana
...checks & metrics for various milestones of the project 5. TCL, Perl, Python scripting Experience: 3 to 5 years Location: Hyderabad Notice Period: Immediate
30+ days ago in JobrapidoReport -
Staff Engineer- Design Verification
new CYIENT Hyderabad, Telangana
...perl or TCL for automation tasks. Able to track & manage Daily and weekly progress and manage a team of 6 to 7 Engineers. Interact with the customer on the...
1 day ago in WhatjobsReport -
Physical Design Automation Lead
new SmartSoC Solutions Hyderabad, Telangana
...Perl, Python). Ensure consistent and reliable execution across multiple parallel design containers. Uday muday_-------@yahoo.com "Mining the Knowledge...
18 h 17 minutes ago in Talent.comReport -
SoC Architect
Best NanoTech Hyderabad, Telangana
...Perl, and assembly algorithms. Familiarity with proprietary and 3rd-party RF logic design tools. Please let me know a good time to connect. Regards Anil...
24 days ago in JobrapidoReport -
Senior Design Verification Engineer
MosChip® Hyderabad, Telangana
...Perl, Tcl/Tk, Shell is a definite plus. Experience with simulators like ncVerilog (Incisive), VCS, Eldo and debug tools like Verdi/Debussy. Good...
30+ days ago in JobrapidoReport
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