Perl job offers in gujarat
601-615 of 615 jobs
- Surat 64
- Ahmedabad 61
- Jamnagar 60
- Nadiad 60
- Junagadh 55
- Rajkot 55
- Vadodara 55
- Gandhinagar 54
- Anand 52
- Bhavnagar 52
- Gujarat 615
- Engineer 127
- Design Engineer 125
- Designer 66
- Erp,Consultant 41
- Qa Analyst 33
- Analyst 32
- Asic Design Engineer 31
- Oracle Database Administrator 11
- Qa Engineer 11
- Senior Engineer 11
- einfochips 131
- mirafra technologies 25
- mediatek 12
- extreme networks 9
- capgemini 4
- fico 3
- cadence design systems 1
- Apprenticeship
- Contractor 41
- Graduate
- Permanent
- Temporary
- Volunteer
- Full Time 5
- Part Time
- Last day 11
- Within the last 7 days 473
-
Analog/Mixed-Signal Functional Verification (Surat)
MediaTek Surat, Gujarat +30 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Analog/Mixed-Signal Functional Verification (Anand)
MediaTek Anand, Gujarat +30 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Analog/Mixed-Signal Functional Verification (Vapi)
MediaTek Vapi, Gujarat +30 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Analog/Mixed-Signal Functional Verification (Nadiad)
MediaTek Nadiad, Gujarat +30 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Analog/Mixed-Signal Functional Verification (Rajkot)
MediaTek Rajkot, Gujarat +30 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Principal Design Engineer (Ahmedabad)
Mulya Technologies Ahmedabad, Gujarat
...(Python/Perl). Experience with block-level and full-chip design at advanced nodes (≤ 16nm). Silicon bring-up and post-silicon debug experience. Familiarity...
3 days ago in Kitjob_inReport -
Principal Design Engineer (Gandhinagar)
Mulya Technologies Gandhinagar, Gujarat
...(Python/Perl). Experience with block-level and full-chip design at advanced nodes (≤ 16nm). Silicon bring-up and post-silicon debug experience. Familiarity...
3 days ago in Kitjob_inReport -
Python Developer with SQL (Nadiad)
Luxoft Nadiad, Gujarat
...Perl. All the Shell scripts were already developed, and there will be a focus on some improvements/automations rather than scripting from scratch. Tasks...
3 days ago in Kitjob_inReport -
Analog/Mixed-Signal Functional Verification (Ahmedabad)
MediaTek Ahmedabad, Gujarat +5 locations
...Perl, Python, Makefile, and revision management (e... Perforce, ClearCase, etc) is a plus. Knowledge of Analog Mixed-Signal Design Fundamentals and analog...
3 days ago in Kitjob_inReport -
Staff ASIC Design Engineer (Rajkot)
Axiado Rajkot, Gujarat
...Perl, Python); Must have gone through at least one tapeout. Preferred: Silicon bring-up and debug experience. Experience in working with repository...
3 days ago in Kitjob_inReport -
Principal Design Engineer (Vadodara)
Cadence Vadodara, Gujarat
...Perl, TCL, Python) and automation of design database qualification and packaging. Checks and validation of package consistency. O Bug reporting and...
3 days ago in Kitjob_inReport -
Python Developer with SQL (Rajkot)
Luxoft Rajkot, Gujarat
...Perl. All the Shell scripts were already developed, and there will be a focus on some improvements/automations rather than scripting from scratch. Tasks...
3 days ago in Kitjob_inReport -
Sr. Engineer/Lead, Digital IP/RTL Design (Surat)
L&T Semiconductor Technologies Surat, Gujarat +3 locations
...Perl, Tcl etc. Positive communication skills and the ability to work effectively within a team environment. Why Join Us? Work on advanced SoC and IP...
5 days ago in Kitjob_inReport -
Staff ASIC Design Engineer (Junagadh)
Axiado Junagadh, Gujarat
...Perl, Python); Must have gone through at least one tapeout. Preferred: Silicon bring-up and debug experience. Experience in working with repository...
3 days ago in Kitjob_inReport -
Principal Design Engineer (Vapi)
Mulya Technologies Vapi, Gujarat
...(Python/Perl). Experience with block-level and full-chip design at advanced nodes (≤ 16nm). Silicon bring-up and post-silicon debug experience. Familiarity...
3 days ago in Kitjob_inReport
« Previous 22 23 24 25
Receive alerts for this search