Rtl design job offers in bangalore, karnataka
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Silicon Architecture/Design Engineer, PhD, Early Career...
Google India Bangalore, Karnataka
Job Description Report this job: Silicon Architecture/Design Engineer, PhD, Early Career Location: Bengaluru, Karnataka, India Experience Level: Mid Minimum...
2 days ago in Kitjob_inReport -
[V176] Silicon Architecture/Design Engineer, PhD, Early...
Google India Bangalore, Karnataka
Job Description Report this job: Silicon Architecture/Design Engineer, PhD, Early Career Location: Bengaluru, Karnataka, India Experience Level: Mid Minimum...
2 days ago in Kitjob_inReport -
[EQ213] Memory subsystem design verification (ddr/hbm...
new Eteros Technologies Bangalore, Karnataka
...design specifications. Integrate and bring up Verification IPs (VIPs) such as DDR_PHY and memory models into UVM environments. Develop drivers, checkers...
1 day ago in Kitjob_inReport -
Technical Lead - Design Verification (SV UVM) - [CVC-227]
new Thales Bangalore, Karnataka
...Design using VHDL, FPGA Implementation, Testing, Integration and delivery of FPGA based hardware systems for DefensemilitaryAerospace Applications...
1 day ago in Kitjob_inReport -
Technical Lead - Design Verification (SV UVM) | (JBZ-399)
new Thales Bangalore, Karnataka
...Design using VHDL, FPGA Implementation, Testing, Integration and delivery of FPGA based hardware systems for DefensemilitaryAerospace Applications...
1 day ago in Kitjob_inReport -
(LSG-404) | IP/SOC Design Lead - GFX Engineering
Advanced Micro Devices Bangalore, Karnataka
...excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS. GFX Design...
3 days ago in Kitjob_inReport -
[WRV-883] | ASIC Design Verification Engineer | UVM | Exp...
cisco systems Bangalore, Karnataka
...design verification experience. Proficient in ASIC verification using UVM/System Verilog. Proficient in verifying sophisticated blocks, clusters and top...
2 days ago in Kitjob_inReport -
Chip Lead - Technologist Silicon Design Engineer - [CY-988]...
new Advanced Micro Devices Bangalore, Karnataka
Chip Lead. Technologist Silicon Design Engineer. Bangalore, India. Engineering. 67347 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply...
1 day ago in Kitjob_inReport -
SOC/ Fullchip STA Engineer F-396
7Rays Semiconductors India Private Bangalore, Karnataka
Experience. 4 to 8 years RTL to Netlist Synthesis experience in Genus and Design compiler is a basic requirement. Meet all the DC/Genus exit criteria...
3 days ago in Kitjob_inReport -
[YVO-194] FPGA Engineers
new ACL Digital Bangalore, Karnataka
JD. 3+ Years of experience. Good FPGA RTL coding skills with strong basics design concepts. Hands on experience in FPGA tools like Vivado. Understanding of...
22 h 48 minutes ago in Kitjob_inReport -
[W856] SOC/ Fullchip STA Engineer
7Rays Semiconductors India Private Bangalore, Karnataka
Experience. 4 to 8 years. RTL to Netlist Synthesis experience in Genus and Design compiler is a basic requirement. Meet all the DC/Genus exit criteria...
2 days ago in Kitjob_inReport -
ASIC Engineer, Implementation - [F-009]
Only for registered members Bangalore, Karnataka
...(RTL) coding using Verilog/System Verilog. Knowledge of Timing/physical libraries, Static Random Access Memory (SRAM). Experience with Power, Performance...
3 days ago in Kitjob_inReport -
Chip lead | KAV724
new SiliconAuto India Bangalore, Karnataka
...(STA) and power-performance-area (PPA) optimization UPF/CPF for low-power design Familiarity with design for manufacturability, test (DFT), and silicon debug.
1 day ago in Kitjob_inReport -
Chip Lead | (VNK741)
new SiliconAuto India Bangalore, Karnataka
...(STA) and power-performance-area (PPA) optimization UPF/CPF for low-power design Familiarity with design for manufacturability, test (DFT), and silicon debug.
23 h 7 minutes ago in Kitjob_inReport -
(ZLF-004) - ASIC Engineer, Frontend Implementation RDC/CDC
Meta Bangalore, Karnataka
...RTL & Netlist. Experience with Netlist-CDC Analysis and improving MTBF. Knowledge of Timing/physical libraries, SRAM Memories About Meta: Meta builds...
3 days ago in Kitjob_inReport -
NQL-557 - ASIC Engineer, Frontend Implementation RDC/CDC
Meta Bangalore, Karnataka
...RTL & Netlist. Experience with Netlist-CDC Analysis and improving MTBF. Knowledge of Timing/physical libraries, SRAM Memories About Meta: Meta builds...
3 days ago in Kitjob_inReport -
(TX-306) - ASIC Engineer, Power
Meta Platform Bangalore, Karnataka
...Strong knowledge of ASIC design methodologies and tools. Excellent communication and interpersonal skills Strong analytical and problem-solving skills
3 days ago in Kitjob_inReport -
Trainee Engineer - STA | [SL-01]
new QuEST Global Bangalore, Karnataka
...Skills Basics of timing concepts: setup, hold, clock tree STA tools (PrimeTime, etc) Scripting languages (TCL, Shell) Chip design flow from RTL to GDSII
1 day ago in Kitjob_inReport -
[C17] - Trainee Engineer - STA
new QuEST Global Bangalore, Karnataka
...Skills Basics of timing concepts: setup, hold, clock tree STA tools (PrimeTime, etc) Scripting languages (TCL, Shell) Chip design flow from RTL to GDSII
1 day ago in Kitjob_inReport -
JL-698 - Field-Programmable Gate Arrays Engineer
ACL Digital Bangalore, Karnataka
FPGA Design Engineer Experience: 4 years Location: Bangalore Job Description: •4+ years of experience in PL design creation. Working experience on Vivado...
3 days ago in Kitjob_inReport -
[M410] | Field-Programmable Gate Arrays Engineer
ACL Digital Bangalore, Karnataka
FPGA Design Engineer Experience: 4 years Location: Bangalore Job Description: •4+ years of experience in PL design creation. Working experience on Vivado...
3 days ago in Kitjob_inReport -
Project Engineering Management, Staff Engineer (LWX705)
new Synopsys Bangalore, Karnataka
...way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
1 day ago in Kitjob_inReport -
Project Engineering Management, Staff Engineer O68
new Synopsys Bangalore, Karnataka
...way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
1 day ago in Kitjob_inReport -
Engineer the Future with Us - [NM-084]
Synopsys Bangalore, Karnataka
...way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
2 days ago in Kitjob_inReport -
Engineer the Future with Us - H-752
Synopsys Bangalore, Karnataka
...way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
2 days ago in Kitjob_inReport
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