Senior memory layout design job offers in bangalore, karnataka

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  • 15h Left: Senior CAD Engineer (PDK, Layout, Analog...

    new Synopsys Bangalore, Karnataka

    The Custom Design Solutions Team is part of Synopsys Circuit Design & TCAD Solutions Group. We work with top-tier Synopsys customers to deploy high-quality...
    1 day ago in Kitjob_in

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  • [QD-141] Urgent Search! Senior CAD Engineer (PDK, Layout...

    Synopsys Bangalore, Karnataka

    The Custom Design Solutions Team is part of Synopsys Circuit Design & TCAD Solutions Group. We work with top-tier Synopsys customers to deploy high-quality...
    3 days ago in Kitjob_in

    Report
  • [YPX-319] Design Verification -Senior Engineer / Lead

    Eteros Technologies Bangalore, Karnataka

    ...memory protocol. Experience with the AMBA- AXI/APB protocols. Experience in ARM base SoC Verification is a plus. Knowledge of scripting languages like Perl...
    4 days ago in Kitjob_in

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  • Design Verification -Senior Engineer / Lead [OBA-86]

    new Eteros Technologies Bangalore, Karnataka

    ...memory protocol. Experience with the AMBA- AXI/APB protocols. Experience in ARM base SoC Verification is a plus. Knowledge of scripting languages like Perl...
    1 day ago in Kitjob_in

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  • [H698] | Design Verification -Senior Engineer / Lead

    Eteros Technologies Bangalore, Karnataka

    ...memory protocol. Experience with the AMBA- AXI/APB protocols. Experience in ARM base SoC Verification is a plus. Knowledge of scripting languages like Perl...
    4 days ago in Kitjob_in

    Report
  • Design Verification -Senior Engineer / Lead - [IO834]

    new Eteros Technologies Bangalore, Karnataka

    ...memory protocol. Experience with the AMBA- AXI/APB protocols. Experience in ARM base SoC Verification is a plus. Knowledge of scripting languages like Perl...
    1 day ago in Kitjob_in

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  • Analog Design Manager - (JU100)

    Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    3 days ago in Kitjob_in

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  • Analog Design Manager- NVM (N616)

    new Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    1 day ago in Kitjob_in

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  • Analog Design Manager- NVM [JBD656]

    new Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    1 day ago in Kitjob_in

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  • [DYZ-982] Analog Design Manager

    Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    3 days ago in Kitjob_in

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  • Analog Design Manager- NVM [L924]

    new Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    1 day ago in Kitjob_in

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  • B636 - Design Verification -Senior Engineer / Lead [3 Days...

    Eteros Technologies Bangalore, Karnataka

    ...memory protocol. Experience with the AMBA- AXI/APB protocols. Experience in ARM base SoC Verification is a plus. Knowledge of scripting languages like Perl...
    3 days ago in Kitjob_in

    Report
  • (Apply Now) Analog Design Manager - [S249]

    Texas Instruments Bangalore, Karnataka

    ...tools (e... Cadence Virtuoso, SPICE) and modeling tools (e... matlab, verilog-a). Familiarity with process technology and layout considerations for advanced
    3 days ago in Kitjob_in

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  • [EC-746] | Senior Hardware Engineer

    L&T Semiconductor Technologies Bangalore, Karnataka

    Job Title: Senior Hardware Engineer Location: Bengaluru | Job Type: Full-Time | Experience Level: 3-4yrs Job Summary: Seeking a skilled and innovative...
    2 days ago in Kitjob_in

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  • U185 | ▷ [Urgent Search] Senior Hardware Engineer

    L&T Semiconductor Technologies Bangalore, Karnataka

    Job Title: Senior Hardware Engineer Location: Bengaluru | Job Type: Full-Time | Experience Level: 3-4yrs Job Summary: Seeking a skilled and innovative...
    4 days ago in Kitjob_in

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  • VLSI - DFT Senior Engineer/Lead Engineer NM859

    Eteros Technologies Bangalore, Karnataka

    ...Test-plan, implementation methodologies - Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG,
    4 days ago in Kitjob_in

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  • [29/03/2025] Senior Hardware Engineer | [R-956]

    L&T Semiconductor Technologies Bangalore, Karnataka

    Job Title: Senior Hardware Engineer Location: Bengaluru | Job Type: Full-Time | Experience Level: 3-4yrs Job Summary: Seeking a skilled and innovative...
    3 days ago in Kitjob_in

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  • [Urgent Search] VLSI - DFT Senior Engineer/Lead Engineer |...

    Eteros Technologies Bangalore, Karnataka

    ...Test-plan, implementation methodologies - Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG,
    3 days ago in Kitjob_in

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  • VLSI - DFT Senior Engineer/Lead Engineer - (KNI-245)

    new Eteros Technologies Bangalore, Karnataka

    ...methodologies Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG, Simulations, post-Si
    1 day ago in Kitjob_in

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  • 3 Days Left: VLSI - DFT Senior Engineer/Lead Engineer |...

    new Eteros Technologies Bangalore, Karnataka

    ...Test-plan, implementation methodologies - Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG,
    1 day ago in Kitjob_in

    Report
  • (GZ-773) - VLSI - DFT Senior Engineer/Lead Engineer

    Eteros Technologies Bangalore, Karnataka

    ...methodologies Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG, Simulations, post-Si
    3 days ago in Kitjob_in

    Report
  • EE739 - VLSI - DFT Senior Engineer/Lead Engineer [15h Left]...

    Eteros Technologies Bangalore, Karnataka

    ...Test-plan, implementation methodologies - Experience in scan insertion, memory-BIST, JTAG/IJTAG, CTL, IEEE 1149.1/1500 wrappers, BSCAN, Compression, ATPG,
    2 days ago in Kitjob_in

    Report

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Senior memory layout design job offers in bangalore, karnataka

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