Verification engineer job offers in haryana
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BIM Design Engineer (MEP) (Panipat)
new engineering Panipat, Haryana
...engineering solutions for Plumbing, Mechanical, Electrical, and Fire Fighting services. Role Description We are seeking a full time BIM Design Engineer...
1 day ago in Kitjob_inReport -
Systems Engineer - Spacecraft Electronics (Panchkula)
Azista Space Panchkula, Haryana +1 Location
Designation: Systems Engineer. Spacecraft Electronics Location: Ahmedabad (In office) Experience: 0-1 yrs About Azista Space: Azista Space is a leading...
2 days ago in Kitjob_inReport -
Systems Engineer - Spacecraft Electronics (Faridabad)
Azista Space Faridabad, Haryana +5 locations
Designation: Systems Engineer. Spacecraft Electronics Location: Ahmedabad (On-Site) Experience: 0-1 yrs About Azista Space: Azista Space is a leading player...
2 days ago in Kitjob_inReport -
Systems Engineer - Spacecraft Electronics (Panipat)
Azista Space Panipat, Haryana +23 locations
Designation: Systems Engineer. Spacecraft Electronics Location: Ahmedabad (On-Site) Experience: 0-1 yrs About Azista Space: Azista Space is a leading player...
2 days ago in Kitjob_inReport -
Senior Software Engineer I (Haryana)
Optum Haryana, Haryana
...by producing clean effective code Automate tasks through appropriate tools and scripting Review and debug code Perform validation performance and verification...
3 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer (Panipat)
NAM Info Panipat, Haryana +4 locations
...with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to -----@nam-it.com Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer...
NAM Info Panchkula, Haryana +2 locations
...the resume along with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer...
NAM Info Panchkula, Haryana
...with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to -----@nam-it.com Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer...
NAM Info Faridabad, Haryana +2 locations
...the resume along with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer (Panipat)
NAM Info Panipat, Haryana +11 locations
...the resume along with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
Application Specific Integrated Circuit Engineer...
NAM Info Faridabad, Haryana +5 locations
...with your LWD or notice time to join this project and Current CTC and Expected CTC and send it to -----@nam-it.com Role: DDR IP or Subsystem Level Verification...
2 days ago in Kitjob_inReport -
DFT Engineer (Staff/Sr. Staff) (Panipat)
MediaTek Panipat, Haryana +9 locations
DFT Engineer (Staff/Sr. Staff) About the Role Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug...
2 days ago in Kitjob_inReport -
DFT Engineer (Staff/Sr. Staff) (Panipat)
MediaTek Panipat, Haryana +6 locations
DFT Engineer (Staff/Sr. Staff) About the Role Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug...
2 days ago in Kitjob_inReport -
DFT Engineer (Staff/Sr. Staff) (Panchkula)
MediaTek Panchkula, Haryana
DFT Engineer (Staff/Sr. Staff) About the Role Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug...
2 days ago in Kitjob_inReport -
DFT Engineer (Staff/Sr. Staff) (Faridabad)
MediaTek Faridabad, Haryana +5 locations
DFT Engineer (Staff/Sr. Staff) About the Role Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug...
2 days ago in Kitjob_inReport -
Senior Test Engineer Manual Testing Haryana
new stryker Haryana, Haryana
...Onsite What you will do: Together with the software team, develop a testing strategy for testing during the developmental phase. Develop the verification...
1 day ago in Kitjob_inReport -
Civil & Interior Mep Billing Engineer (Haryana)
new KMS Interior Haryana, Haryana
...CV to 8929049--- Subject Line Civil Interior MEP Billing Engineer. KMS Interior Job Type Full time Pay 30 00- --. 50 00- -- per month Work Location In person
1 day ago in Kitjob_inReport -
Senior NEtwork Engineer (EVPN / VXLAN) (Faridabad)
CACI Faridabad, Haryana +1 Location
...verification. Document network estate for Operation Support and to support change planning Maintain infrastructure database Complete network diagrams to a...
2 days ago in Kitjob_inReport -
Senior NEtwork Engineer (EVPN / VXLAN) (Panipat)
CACI Panipat, Haryana
...verification. Document network estate for Operation Support and to support change planning. Maintain infrastructure database. Complete network diagrams to a...
2 days ago in Kitjob_inReport -
Senior Network Engineer (Evpn / Vxlan) (Faridabad)
CACI Faridabad, Haryana
...verification. Document network estate for Operation Support and to support change planningMaintain infrastructure databaseComplete network diagrams to a...
2 days ago in Kitjob_inReport -
Senior NEtwork Engineer (EVPN / VXLAN) (Panchkula)
CACI Panchkula, Haryana +1 Location
...verification. Document network estate for Operation Support and to support change planning Maintain infrastructure database Complete network diagrams to a...
2 days ago in Kitjob_inReport -
PLC/DCS Validation & Test Engineer (Faridabad)
Quantum Integrators Faridabad, Haryana +4 locations
Title: Senior Product Assurance Engineer or PLC/DCS Validation & Test Engineer Location: Hyderabad, Telangana. (Onsite Hybrid) Experience: 4 to 9 years...
2 days ago in Kitjob_inReport -
PLC/DCS Validation & Test Engineer (Panchkula)
Quantum Integrators Panchkula, Haryana
Title: Senior Product Assurance Engineer or PLC/DCS Validation & Test Engineer Location: Hyderabad, Telangana. (Onsite Hybrid) Experience: 4 to 9 years...
2 days ago in Kitjob_inReport -
PLC/DCS Validation & Test Engineer (Panipat)
Quantum Integrators Panipat, Haryana
Title: Senior Product Assurance Engineer or PLC/DCS Validation & Test Engineer Location: Hyderabad, Telangana. (Onsite Hybrid) Experience: 4 to 9 years...
2 days ago in Kitjob_inReport -
Plc/dcs Validation & Test Engineer Panipat
new Quantum Integrators Panipat, Haryana
Job Type: Full time Remote: Hybrid Title: Senior Product Assurance Engineer or PLC/DCS Validation & Test EngineerLocation: Hyderabad, Telangana. (Onsite...
1 day ago in Kitjob_inReport
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