Vlsi design job offers in delhi
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IO Layout Engineer
ACL Digital Delhi, Delhi +1 Location
Job Title: IO Layout Engineer Experience: 3+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / VLSI / IO & ESD Design...
9 days ago in Talent.comReport -
Functional Verification Engineer
ACL Digital Delhi, Delhi +1 Location
Job Title: Functional Verification Engineer Location: Bangalore Experience: 4+ Years Job Type: Full-time Industry: Semiconductor / VLSI / ASIC Design...
9 days ago in Talent.comReport -
Senior PD- CAD Engineer
ACL Digital Delhi, Delhi +1 Location
...(PrimeTime, Tempus). Familiarity with DRC sign-off flows (Calibre). Education: B. E/B.Tech/M. E/M.Tech in Electronics, Electrical, VLSI, or related fields.
9 days ago in Talent.comReport -
Static Timing Analysis (STA) Engineer
LeadSoc Technologies Delhi, Delhi +1 Location
...(SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design...
9 days ago in Talent.comReport -
STA Engineer
LeadSoc Technologies Delhi, Delhi
...Title: Static Timing Analysis (STA) Engineer Job Overview We are looking for a highly skilled Static Timing Analysis (STA) Engineer to join our ASIC/SoC design...
9 days ago in Talent.comReport -
SoC DFT Lead
SEMIFIVE Delhi, Delhi +1 Location
...criteria. Qualifications. B.E. /B. Tech or M.E. /M. Tech in Electrical / Electronics / VLSI Engineering. 12+ years of experience in DFT architecture and
9 days ago in Talent.comReport -
SoC STA Lead/ Principal Engineer
SEMIFIVE Delhi, Delhi +1 Location
...reports, and tapeout readiness. Qualifications. B.E. /B. Tech or M.E. /M. Tech in Electrical / Electronics / VLSI Engineering. 12+ years of experience in
9 days ago in Talent.comReport -
Memory Layout Engineer
ACL Digital Delhi, Delhi +1 Location
Job Title: Memory Layout Engineer Experience: 3+yrs Location: Bangalore Job Type: Full-time Industry: Semiconductors / VLSI / Memory Design Job Summary: We...
9 days ago in Talent.comReport -
Staff ASIC Engineer
ScaleFlux Delhi, Delhi +1 Location
...and physical design teams to ensure power goals are met. Perform power analysis at RTL, gate-level, and post-layout stages. Optimize clock gating, power
9 days ago in Talent.comReport -
Fpga design engineer (delhi)
new Berylline Labs Delhi, Delhi
This requirement is for design and development for candidates with experience and working and hands on knowledge of latest FPGAs. Candidates with strong...
1 day ago in Kitjob_inReport -
Logic Design Engineer (Delhi)
new Connectpro Management Consultants Private Delhi, Delhi
Title: Logic Design Engineer Work Location: Bangalore/Hyderabad. Experience: 5 to 15+ years Your Role and Responsibilities As a Logic Design Engineer, you...
1 day ago in Kitjob_inReport -
Fpga Design Engineer New Delhi
new Berylline Labs Delhi, Delhi
This requirement is for design and development for candidates with experience and working and hands on knowledge of latest FPGAs. Candidates with strong...
23 h 24 minutes ago in Kitjob_inReport -
Fpga design engineer (new delhi)
new Berylline Labs Delhi, Delhi
This requirement is for design and development for candidates with experience and working and hands on knowledge of latest FPGAs. Candidates with strong...
1 day ago in Kitjob_inReport -
Logic Design Engineer (New Delhi)
new Connectpro Management Consultants Private Delhi, Delhi
Title: Logic Design Engineer Work Location: Bangalore/Hyderabad. Experience: 5 to 15+ years Your Role and Responsibilities As a Logic Design Engineer, you...
14 h 28 minutes ago in Kitjob_inReport -
Lead Design And Verification Engineer New Delhi
new Blueberry Semiconductors Delhi, Delhi
Note: Fresher profiles will not be considered Job Description Role: Design and Verification Engineer Lead Employment Type: Full Time Location: Bengaluru/...
1 day ago in Kitjob_inReport -
Principal Engineer – Chip Design Back End (New Delhi)
new Toshiba Software Delhi, Delhi
Job Overview: As a Backend (Physical Design) Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the...
1 day ago in Kitjob_inReport -
Physical Design Engineer (CTS / STA / EMIR / Signoff...
new Seminovaa Delhi, Delhi +8 locations
...Bangalore / India (Hybrid / Onsite) 🏢 Company: Seminovaa Technologies Pvt. Ltd. Experience: 2–4 years (Mandatory) 🔧 Domain: ASIC / SoC Physical Design...
1 day ago in Kitjob_inReport -
Sta Engineers (New Delhi)
new Important Group Delhi, Delhi
...45 days Job Description: We are looking for an experienced Static Timing Analysis (STA) Engineer with solid expertise in constraint generation to join our VLSI...
1 day ago in Kitjob_inReport -
SoC STA Lead/ Principal Engineer (New Delhi)
SEMIFIVE Delhi, Delhi
...reports, and tapeout readiness. Qualifications. B.E. /B. Tech or M.E. /M. Tech in Electrical / Electronics / VLSI Engineering. 12+ years of experience in
2 days ago in Kitjob_inReport
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