Vlsi engineer job offers in pune, maharashtra

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  • Design Verification Engineer

    Nurotech circuits Pune, Maharashtra

    ...Tech or M.Tech Electronics Trained VLSI engineers Exposure to SystemVerilog, UVM, VHDL Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    4 days ago in Talent.com

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  • Firmware Developer For leading Manufacturer

    new Skill Ventory Pune, Maharashtra

    Roles and Responsibilities Qualification: BE, BTech, ME, Mtech, MScin ComputerScience, VLSI, Embedded, Electronics(& Telecommunication) Instrumentation...
    21 h 38 minutes ago in Talent.com

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  • Lead DFT Engineer

    ACL Digital Pune, Maharashtra  +78 locations

    Job Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We...
    10 days ago in Talent.com

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  • [UKH924] - Design Verification Engineer

    Nurotech circuits private Pune, Maharashtra

    ...or M.Tech Electronics. Trained VLSI engineers. Exposure to SystemVerilog, UVM, VHDL. Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    6 days ago in Kitjob_in

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  • [MHP537] Design Verification Engineer

    Nurotech circuits private Pune, Maharashtra

    ...or M.Tech Electronics. Trained VLSI engineers. Exposure to SystemVerilog, UVM, VHDL. Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    6 days ago in Kitjob_in

    Report
  • Design Verification Engineer | (OOF99)

    Nurotech circuits private Pune, Maharashtra

    ...Tech or M.Tech Electronics Trained VLSI engineers Exposure to SystemVerilog, UVM, VHDL Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    6 days ago in Kitjob_in

    Report
  • ST873 - Design verification engineer

    Nurotech circuits private Pune, Maharashtra

    ...or M. Tech Electronics Trained VLSI engineers Exposure to System Verilog, UVM, VHDL Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    3 days ago in Kitjob_in

    Report
  • Design Verification Engineer | KIW309

    Nurotech circuits private Pune, Maharashtra

    ...or M.Tech Electronics. Trained VLSI engineers. Exposure to SystemVerilog, UVM, VHDL. Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    4 days ago in Kitjob_in

    Report
  • Design Verification Engineer | (CNC-718)

    Nurotech circuits private Pune, Maharashtra

    ...or M.Tech Electronics. Trained VLSI engineers. Exposure to SystemVerilog, UVM, VHDL. Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    2 days ago in Kitjob_in

    Report
  • (VLF-548) - Design Verification Engineer

    Nurotech circuits private Pune, Maharashtra

    ...or M.Tech Electronics. Trained VLSI engineers. Exposure to SystemVerilog, UVM, VHDL. Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    5 days ago in Kitjob_in

    Report
  • Design Verification Engineer | JIR-896

    Nurotech circuits private Pune, Maharashtra

    ...or M. Tech Electronics Trained VLSI engineers Exposure to System Verilog, UVM, VHDLGood understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    6 days ago in Kitjob_in

    Report
  • Design Verification Engineer | RS-907

    Nurotech circuits private Pune, Maharashtra

    ...Tech or M.Tech Electronics Trained VLSI engineers Exposure to SystemVerilog, UVM, VHDL Good understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    5 days ago in Kitjob_in

    Report
  • Design Verification Engineer | VAL-196

    Nurotech circuits private Pune, Maharashtra

    ...Tech or M.Tech ElectronicsTrained VLSI engineersExposure to SystemVerilog, UVM, VHDLGood understanding of C, C+, OOP concepts. 0-4 years of experience in DV
    6 days ago in Kitjob_in

    Report
  • (FIN-081) | Lead DFT Engineer

    ACL Digital Pune, Maharashtra

    Job Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We...
    7 days ago in Kitjob_in

    Report
  • Senior Digital Design Engineer SS-428

    Espressif Systems Pune, Maharashtra

    ...with FPGA/Silicon validation using C based tests and usage of standard debugging tools Qualifications. M.Tech/B. Tech in the field of VLSI/Electronics...
    7 days ago in Kitjob_in

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