15 asic design engineer job offers in Kakinada, Andhra Pradesh

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  • Asic rtl design

    eInfochips Kakinada, Andhra Pradesh

    ASIC RTL Design Engineer/Lead Job Location: BLR, HYD, AHM, NOIDA, CHENNAI Work From Office (No Work from Home) Roles and Responsibilities: 4. 9 years of ASIC...
    9 days ago in Talent.com

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  • Asic rtl design

    eInfochips Kakinada, Andhra Pradesh  +78 locations

    ASIC RTL Design Engineer/Lead Job Location: BLR, HYD, AHM, NOIDA, CHENNAI Work From Office (No Work from Home) Roles and Responsibilities: 4. 9 years of ASIC...
    13 days ago in Jobrapido

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  • Senior Engineer – ASIC Design Verification

    eInfochips Kakinada, Andhra Pradesh  +77 locations

    Role: Senior Engineer – ASIC Design Verification Location: Across India Experience: 4 to 8 Years WORK FROM OFFICE: Bangalore | Hyderabad |Chennai |Noida |...
    13 days ago in Jobrapido

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  • Senior Engineer – ASIC Design Verification

    eInfochips Kakinada, Andhra Pradesh

    Role: Senior Engineer – ASIC Design Verification Location: Across India Experience: 4 to 8 Years WORK FROM OFFICE: Bangalore | Hyderabad |Chennai |Noida |...
    9 days ago in Talent.com

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  • Senior Engineer – ASIC Verification - Bangalore, Hyderabad...

    eInfochips Kakinada, Andhra Pradesh

    Role: Senior Engineer – ASIC Design Verification Job Location: Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, Pune Experience: 4 to 8 Years (NO WORK FROM...
    9 days ago in Talent.com

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  • Power-domain implementation (Low-power/IR-Drop/) Engineer

    Eteros Technologies Kakinada, Andhra Pradesh  +51 locations

    ...with at least 3+ years hands-on experience in ASIC/SOC low-power implementation/Power-analysis/IR Drop analysis/Reliability(EM/ESD) Analysis. Experience: •
    3 days ago in Whatjobs

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  • Senior Engineer – ASIC Verification - Bangalore, Hyderabad...

    eInfochips Kakinada, Andhra Pradesh  +78 locations

    Role: Senior Engineer – ASIC Design Verification Job Location: Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, Pune Experience: 4 to 8 Years (NO WORK FROM...
    14 days ago in Jobrapido

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  • VLSI - Synthesis and Static Timing Analysis - Senior Design...

    Eteros Technologies Kakinada, Andhra Pradesh  +77 locations

    ...ASIC timing constraints generation and timing closure. Expertise in STA tools (Tempus and Primetime) and methodologies for timing closure with a good...
    24 days ago in Jobrapido

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  • VLSI - Synthesis and Static Timing Analysis - Senior Design...

    Eteros Technologies Kakinada, Andhra Pradesh

    ...ASIC timing constraints generation and timing closure. Expertise in STA tools (Tempus and Primetime) and methodologies for timing closure with a good...
    12 days ago in Talent.com

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  • Power-domain implementation (Low-power/IR-Drop/) Engineer

    Eteros Technologies Kakinada, Andhra Pradesh  +73 locations

    ...Tech/M. Tech/PhD with at least 3+ years hands-on experience in ASIC/SOC low-power implementation/Power-analysis/IR Drop analysis/Reliability(EM/ESD)
    24 days ago in Jobrapido

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  • Power-domain implementation (Low-power/IR-Drop/) Engineer

    Eteros Technologies Kakinada, Andhra Pradesh

    ...Tech/M. Tech/PhD with at least 3+ years hands-on experience in ASIC/SOC low-power implementation/Power-analysis/IR Drop analysis/Reliability(EM/ESD)
    12 days ago in Talent.com

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  • (C-544) - Senior Staff Engineer - RTL Design

    Mulya Technologies Kakinada, Andhra Pradesh  +1 Location

    Senior Staff Engineer. RTL Design Location: Bangalore /Pune We enable tomorrow’s future by accelerating the critical data communication at the heart of our...
    5 days ago in Kitjob_in

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  • IVO392 | RTL Engineer and Design Verification engineer

    TESSOLVE Kakinada, Andhra Pradesh

    Opportunity With Tessolve Semiconductor. Bangalore Hi All, we are hiring RTL design engineer and design verification engineer for Bangalore location. Exp: 8+...
    2 days ago in Kitjob_in

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  • VLSI - Synthesis and Static Timing Analysis - Senior Design...

    Eteros Technologies Kakinada, Andhra Pradesh  +3 locations

    ...ASIC timing constraints generation and timing closure. Expertise in STA tools (Tempus and Primetime) and methodologies for timing closure with a good...
    5 days ago in Kitjob_in

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  • [IBU871] | DFT Engineer/Lead/ Manager

    TESSOLVE Kakinada, Andhra Pradesh

    > > Immediate hiring! Gt; > > > > Tessolve Semiconductors is hiring for below positions > > Position: DFT Engineer > >...
    2 days ago in Kitjob_in

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