Asic verilog design job offers in hyderabad, andhra pradesh
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Asic rtl engineer
Wipro Hyderabad, Andhra Pradesh
Requirement Name: ASIC RTL / So C RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead...
30+ days ago in Labor24Report -
Asi rtl engineer 4+years hyd
ACL Digital Hyderabad, Andhra Pradesh
RTL Design: Design and implement RTL code for ASICs in Verilog or System Verilog. Create high-quality, reusable, and maintainable RTL code for complex...
30+ days ago in Labor24Report -
ASIC Design Verification Lead
eInfochips Hyderabad, Andhra Pradesh +1 Location
JOB DESCRIPTION, ROLE & RESPONSIBILITES POSITION TITLE: Technical Lead – ASIC Design Verification LOCATION: Hyderabad/Bangalore/Chennai/Ahmedabad POSITION...
3 days ago in WhatjobsReport -
Asic rtl engineer
Wipro Hyderabad, Andhra Pradesh +2 locations
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
3 days ago in WhatjobsReport -
ASIC Digital Design, Manager
Confidential Hyderabad, Andhra Pradesh
...with processor architects Modelling and analysing functional coverage and conducting code coverage analysis. Debugging and resolving mismatches between design...
Gross/year: ₹ 12 lakhs
30+ days ago in Monster India PREMIUMReport -
ASIC Digital Design, Staff Engineer
Confidential Hyderabad, Andhra Pradesh
What You ll Need: BSEE or MSEE with a minimum of 4 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and...
Gross/year: ₹ 7 lakhs
30+ days ago in Monster India PREMIUMReport -
ASIC Digital Design, Sr Engineer
Confidential Hyderabad, Andhra Pradesh
...Creation of tests. Both directed and random Functional coverage modelling and review, Code coverage review Debugging and resolving mismatches between design...
Gross/year: ₹ 5 lakhs
30+ days ago in Monster India PREMIUMReport -
ASIC IP Verification Manager
Confidential Hyderabad, Andhra Pradesh
We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform...
Gross/year: ₹ 11 lakhs
30+ days ago in MonsterReport -
ASIC Digital Design, Sr Engineer
Confidential Hyderabad, Andhra Pradesh
...degree in electronics or a related engineering field, you bring 3-5 years of hands-on experience in digital verification Your proficiency in system verilog...
Gross/year: ₹ 9 lakhs
30+ days ago in Monster India PREMIUMReport -
RTL Design Lead /Manager
BITSILICA Hyderabad, Andhra Pradesh
Job Summary: We are looking for a highly experienced RTL Design Lead to drive the architecture, micro-architecture, and RTL development of digital IP/SoC...
6 days ago in WhatjobsReport -
ASIC IP Verification Manager
Confidential Hyderabad, Andhra Pradesh +1 Location
We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform...
Gross/year: ₹ 11 lakhs
30+ days ago in Monster India PREMIUMReport -
ASI RTL Engineer 4+years HYD
new ACL Digital Hyderabad, Andhra Pradesh +1 Location
RTL Design: Design and implement RTL code for ASICs in Verilog or SystemVerilog. Create high-quality, reusable, and maintainable RTL code for complex digital...
17 h 45 minutes ago in WhatjobsReport -
Verification Lead
ACL Digital Hyderabad, Andhra Pradesh +1 Location
...Experience: 7+ years Location: Hyderabad Job Description: Work as a member of a geographically distributed verification team to verify next-generation ASIC...
2 days ago in WhatjobsReport -
SoC Frontend Design Engineer
Confidential Hyderabad, Andhra Pradesh
...functional coverage Perform simulations and debugging to ensure design correctness Participate in design reviews and provide feedback to improve design quality
Gross/year: ₹ 8 lakhs
30+ days ago in MonsterReport -
Senior Design Verification Engineer
BITSILICA Hyderabad, Andhra Pradesh +1 Location
Over 10 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System...
16 days ago in WhatjobsReport -
SoC Frontend Design Engineer
Confidential Hyderabad, Andhra Pradesh +3 locations
...functional coverage Perform simulations and debugging to ensure design correctness Participate in design reviews and provide feedback to improve design quality
Gross/year: ₹ 8 lakhs
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...focus of this role is to plan, build, and execute the verification of new and existing features for AMD's CSoC DV, resulting in no bugs in the final design...
Gross/year: ₹ 12 lakhs
30+ days ago in Monster India PREMIUMReport -
Senior Design Verification Engineer
Confidential Hyderabad, Andhra Pradesh
.../ verification environments. Ability to focus on finding the design issues and corner cases. Knowledge of version control systems (GIT is preferable).
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...design specification, architecture and micro-architecture, Knowledge of various IP protocols is a plus. ACADEMIC CREDENTIALS: Bachelor or Masters Degree in...
Gross/year: ₹ 9.5 lakhs
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
Lead FPGA Design Engineer
ACL Digital Hyderabad, Andhra Pradesh +1 Location
Job Title: Lead FPGA Design Engineer Experience Required: 6+ years Location: Hyderabad/Bangalore Job Type: Full-time Industry: Semiconductor / Electronics /...
16 days ago in WhatjobsReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...Design/Integration activities Have knowledge of SOC design specification, architecture and micro-architecture, Knowledge of various IP protocols is a plus.
Gross/year: ₹ 13 lakhs
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...focus of this role is to plan, build, and execute the verification of new and existing features for AMD's CSoC DV, resulting in no bugs in the final design...
Gross/year: ₹ 12 lakhs
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh +1 Location
...role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design...
Gross/year: ₹ 10 lakhs
30+ days ago in Monster India PREMIUMReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh +1 Location
...role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design...
Gross/year: ₹ 8 lakhs
30+ days ago in Monster India PREMIUMReport
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