Asic verilog design job offers in hyderabad, andhra pradesh
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Senior Design Verification Lead /Manager
BITSILICA Hyderabad, Andhra Pradesh
Summary: Over 8 years of experience in digital IP verification with a strong understanding of ASIC/SoC design and state-of-the-art verification methodologies...
2 days ago in WhatjobsReport -
Principal IP/RTL Design Engineer for TPU
new Mulya Technologies Hyderabad, Andhra Pradesh +4 locations
Principal IP/RTL Design Engineer for TPU Hyderabad / BangaloreFounded by highly respected Silicon Valley veterans. With its design centers established in...
1 day ago in WhatjobsReport -
Principal IP/RTL Design Engineer for Ethernet Switch
Mulya Technologies Hyderabad, Andhra Pradesh +3 locations
Principal IP/RTL Design Engineer for Ethernet SwitchBangalore / Hyderabad Founded by highly respected Silicon Valley veterans. With its design centers...
2 days ago in WhatjobsReport -
Principal Ip/Rtl Design Engineer For Arm Cmn Fabric And...
new Mulya Technologies Hyderabad, Andhra Pradesh
IPrincipal P/RTL Design Engineer for ARM CMN Fabric and Neoverse Bangalore / Hyderabad Founded by highly respected Silicon Valley veterans. With its design...
1 day ago in WhatjobsReport -
Principal IP/RTL Design Engineer for ARM CMN Fabric and...
Mulya Technologies Hyderabad, Andhra Pradesh +3 locations
IPrincipal P/RTL Design Engineer for ARM CMN Fabric and NeoverseBangalore / Hyderabad Founded by highly respected Silicon Valley veterans. With its design...
4 days ago in WhatjobsReport -
Design Verification Engineer
Confidential Hyderabad, Andhra Pradesh
Bachelor's/Master's degree in Electrical Engineering or related field. 7–10 years of experience in ASIC/SoC design verification. Strong expertise in Verilog...
30+ days ago in MonsterReport -
Asi Rtl Engineer 4+Years Hyd
new ACL Digital Hyderabad, Andhra Pradesh
RTL Design: Design and implement RTL code for ASICs in Verilog or SystemVerilog. Create high-quality, reusable, and maintainable RTL code for complex digital...
1 day ago in WhatjobsReport -
FPGA Verification Team lead
new Expert Executive Recruiters (EER Global) Hyderabad, Andhra Pradesh +2 locations
...will plan and build a UVM SV environment and lead a team of verification engineers responsible for ensuring the functional verification of a full FPGA design...
1 day ago in WhatjobsReport -
AI Centre Ethernet Switching Architect
new Mulya Technologies Hyderabad, Andhra Pradesh
...could be based anywhere in India. Remote work will be considered for exceptional profiles Founded by highly respected Silicon Valley veterans. With its design...
1 day ago in WhatjobsReport -
Sr. Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC boundaries, power...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
SoC Frontend Design Engineer
Confidential Hyderabad, Andhra Pradesh +3 locations
...functional coverage Perform simulations and debugging to ensure design correctness Participate in design reviews and provide feedback to improve design quality
Gross/year: ₹ 8 lakhs
29 days ago in MonsterReport -
RTL Design Engineer
Confidential Hyderabad, Andhra Pradesh
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent...
Gross/year: ₹ 9 lakhs
30+ days ago in MonsterReport -
Senior Design Verification Engineer
Confidential Hyderabad, Andhra Pradesh
.../ verification environments. Ability to focus on finding the design issues and corner cases. Knowledge of version control systems (GIT is preferable).
29 days ago in MonsterReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh +1 Location
...Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
CPU Physical Design Engineer
Confidential Hyderabad, Andhra Pradesh
...Clock Tree Implementation Techniques for High Speed Design Implementation are required Exposure to Constraint management tool and Verilog coding experience
Gross/year: ₹ 5 lakhs
30+ days ago in MonsterReport -
Sr. Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
Design Verification Engineer
Confidential Hyderabad, Andhra Pradesh
THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has...
Gross/year: ₹ 4 lakhs
30+ days ago in MonsterReport -
MTS Silicon Design Engineer
Confidential Hyderabad, Andhra Pradesh
...Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design...
Gross/year: ₹ 15 lakhs
30+ days ago in MonsterReport -
Sr. Manager Silicon Design Engineering
Confidential Hyderabad, Andhra Pradesh
We are looking for a Senior Manager Silicon Design Engineering to lead a team of talented engineers in developing NPU IP. This IP goes to several products...
Gross/year: ₹ 10 lakhs
30+ days ago in MonsterReport -
Staff Verification Engineer
Confidential Hyderabad, Andhra Pradesh
...or System Verilog RNM Automation of verification flow with Python/Perl in an industrial setting Analog behavioral model development/verification experience
30+ days ago in MonsterReport -
UPF & Power Simulation
Confidential Hyderabad, Andhra Pradesh
...design tools, simulation methodologies, and hardware description languages (HDLs). Excellent analytical and problem-solving skills with a focus on power...
Gross/year: ₹ 15 lakhs
30+ days ago in MonsterReport -
SOC Verification Engineer
Confidential Hyderabad, Andhra Pradesh
...role is to plan, build, and execute the verification of new and existing features for AMD s graphics processor IP, resulting in no bugs in the final design...
Gross/year: ₹ 7 lakhs
30+ days ago in MonsterReport -
Principal FPGA Engineer
Confidential Hyderabad, Andhra Pradesh
...design, synthesis, timing closure, and verification methodologies. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and...
30+ days ago in MonsterReport -
ASIC Design Engineer - (NU333)
Wipro Hyderabad, Andhra Pradesh
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
2 days ago in Kitjob_inReport -
ASIC Design Engineer | [GM638]
new Wipro Hyderabad, Andhra Pradesh
Requirement Name: ASIC RTL / SoC RTL IP Design (IP RTL design targeted for SOC, Static checks, some basic protocols) Role: Senior Engineer / Technical Lead /...
1 day ago in Kitjob_inReport
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