Chip design job offers in haryana

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  • Research-Focused Agentic AI Developer from Chip Design...

    Cadence System Design and Analysis Gurgaon, Haryana  +106 locations

    ...and research communities Prototype next-generation agentic AI-enabled design tools Maintain exemplary GitHub repositories showcasing research outputs
    4 days ago in Jobrapido

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  • Research-Focused Agentic AI Developer from Chip Design...

    Cadence System Design and Analysis Panipat, Haryana  +106 locations

    ...and research communities Prototype next-generation agentic AI-enabled design tools Maintain exemplary GitHub repositories showcasing research outputs
    4 days ago in Jobrapido

    Report

  • Research-Focused Agentic AI Developer from Chip Design...

    Cadence System Design and Analysis Faridabad, Haryana  +106 locations

    ...and research communities Prototype next-generation agentic AI-enabled design tools Maintain exemplary GitHub repositories showcasing research outputs
    4 days ago in Jobrapido

    Report

  • Research-Focused Agentic AI Developer from Chip Design...

    Cadence System Design and Analysis Panchkula, Haryana  +106 locations

    ...and research communities Prototype next-generation agentic AI-enabled design tools Maintain exemplary GitHub repositories showcasing research outputs
    4 days ago in Jobrapido

    Report

  • Research-Focused Agentic AI Developer from Chip Design...

    Cadence System Design and Analysis Panchkula, Haryana

    ...and research communities Prototype next-generation agentic AI-enabled design tools Maintain exemplary GitHub repositories showcasing research outputs
    2 days ago in Talent.com

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Panchkula, Haryana

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    3 days ago in Whatjobs

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  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Gurgaon, Haryana  +106 locations

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    4 days ago in Jobrapido

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Faridabad, Haryana  +106 locations

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    4 days ago in Jobrapido

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Panchkula, Haryana  +106 locations

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    4 days ago in Jobrapido

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Panipat, Haryana  +106 locations

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    4 days ago in Jobrapido

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Panipat, Haryana

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    2 days ago in Talent.com

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Faridabad, Haryana

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    3 days ago in Whatjobs

    Report

  • Senior Analog Layout Engineer

    Best NanoTech Faridabad, Haryana  +106 locations

    ...with PCIe & GDDR. Exposure to Chip-Package Co-Design (CPCD) and advanced ESD methodologies. Prior experience in product-level high-speed analog chip delivery.
    4 days ago in Jobrapido

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  • Senior Analog Layout Engineer

    Best NanoTech Panchkula, Haryana  +106 locations

    ...with PCIe & GDDR. Exposure to Chip-Package Co-Design (CPCD) and advanced ESD methodologies. Prior experience in product-level high-speed analog chip delivery.
    4 days ago in Jobrapido

    Report

  • Senior Analog Layout Engineer

    Best NanoTech Panipat, Haryana  +106 locations

    ...with PCIe & GDDR. Exposure to Chip-Package Co-Design (CPCD) and advanced ESD methodologies. Prior experience in product-level high-speed analog chip delivery.
    4 days ago in Jobrapido

    Report

  • Senior Analog Layout Engineer

    Best NanoTech Gurgaon, Haryana  +106 locations

    ...with PCIe & GDDR. Exposure to Chip-Package Co-Design (CPCD) and advanced ESD methodologies. Prior experience in product-level high-speed analog chip delivery.
    4 days ago in Jobrapido

    Report

  • ASIC Verification Lead

    eInfochips Faridabad, Haryana

    ...OFFICE ONLY) (no work from home or remote work) What We Offer: A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip...
    4 days ago in Talent.com

    Report

  • Senior Physical Design Engineers – High-Speed SoC/IP (TSMC...

    Best NanoTech Gurgaon, Haryana

    Senior Physical Design Engineers – High-Speed SoC/IP (TSMC 5nm) Remote (India) | Work Hours: USA/Canada Time Zone | Willing to Travel to the U... (US Visa...
    3 days ago in Whatjobs

    Report

  • ASIC Verification Lead

    eInfochips Gurgaon, Haryana  +106 locations

    ...OFFICE ONLY) (no work from home or remote work) What We Offer: A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip...
    30+ days ago in Jobrapido

    Report

  • ASIC Verification Lead

    eInfochips Faridabad, Haryana  +106 locations

    ...OFFICE ONLY) (no work from home or remote work) What We Offer: A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip...
    30+ days ago in Jobrapido

    Report

  • ASIC Verification Lead

    eInfochips Panipat, Haryana  +106 locations

    ...OFFICE ONLY) (no work from home or remote work) What We Offer: A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip...
    30+ days ago in Jobrapido

    Report

  • ASIC Verification Lead

    eInfochips Panchkula, Haryana  +106 locations

    ...OFFICE ONLY) (no work from home or remote work) What We Offer: A Fortune 109 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip...
    30+ days ago in Jobrapido

    Report

  • ASIC Engineer

    Confidential Gurgaon, Haryana  +1 Location

    ...and EM IR Drop You will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan
    30+ days ago in Monster

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  • Full Stack Engineer, Founding team

    AsicBot AI Faridabad, Haryana  +104 locations

    About UsWe're revolutionizing semiconductor design with AI. Our platform automates complex chip design tasks that currently take years and cost hundreds of...
    3 days ago in Whatjobs

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  • Full Stack Engineer, Founding team

    AsicBot AI Panchkula, Haryana  +104 locations

    About UsWe're revolutionizing semiconductor design with AI. Our platform automates complex chip design tasks that currently take years and cost hundreds of...
    3 days ago in Whatjobs

    Report
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Chip design job offers in haryana

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