Chip design job offers in haryana
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Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Panipat, Haryana +104 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Panchkula, Haryana +104 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Talent.comReport -
Synthesis and Static Timing Analysis - Staff Design...
Eteros Technologies Faridabad, Haryana +104 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Talent.comReport -
FPGA Developer - VHDL/Verilog
SKYGATE CONSULTING Gurugram, Haryana
FPGA Developer and FPGA Design Exp: 6-10 years Location: Gurgaon Notice Period: Immedaite Joiners/Serving/30.60 days Job Description: Experience in FPGA...
9 days ago in Talent.comReport -
[S-562] - Synthesis and Static Timing Analysis - Staff...
Eteros Technologies Faridabad, Haryana +51 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Kitjob_inReport -
(NRR-763) | Synthesis and Static Timing Analysis - Staff...
Eteros Technologies Panipat, Haryana +51 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Kitjob_inReport -
(AD313) - Synthesis and Static Timing Analysis - Staff...
Eteros Technologies Panchkula, Haryana +51 locations
...design timing closure flow and methodology. BTech/MTech/PhD with at least 6+ years hands-on experience in ASIC timing constraints generation and timing...
4 days ago in Kitjob_inReport
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