Verilog manager job offers in bangalore, karnataka
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Manager, dft
MediaTek Bangalore, Karnataka
Manager, DFT Responsibilities: Responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug and diagnostics...
30+ days ago in Labor24Report -
Analog Design Manager - Non-Volatile Memory (NVM)
Texas Instruments Bangalore, Karnataka
We are seeking a highly skilled and experienced Analog Design Manager to lead and drive the development of cutting-edge analog and mixed-signal circuits for...
30+ days ago in JobrapidoReport -
VLSI Sales Head
Tata Consultancy Services Bangalore, Karnataka
...and gain customer mindshare. IC Design Services Strategy, Business Plans and roadmap. Guide Business development manager/ sales manager SoW and MSA reviews
29 days ago in JobrapidoReport -
Sr Principal Verification Engineer
NXP Semiconductors Bangalore, Karnataka
...Verilog, C/C+, Shell. High proficiency in Metric Driven Verification concepts, functional and code coverage. High proficiency in directed and constrained...
18 days ago in JobrapidoReport -
VLSI Frontend Services Practice Head
Tata Consultancy Services Bangalore, Karnataka
...Verilog and standard design formats (LEF, DEF, SPEF, etc) Good-to-Have Good industry connects with EDA tool companies, foundries and Tier 1 semiconductor...
15 days ago in JobrapidoReport -
ASIC Design Verification Manager
UST Bangalore, Karnataka
Hi All, Please find roles and responsibilities for ASIC DV lead. Lead with 8 to 18 years of exp is required Experience in System Verilog, UVM, SV. Experience...
4 days ago in Talent.comReport -
ASIC IP Verification Manager
Confidential Bangalore, Karnataka +1 Location
...a deep understanding of ASIC design and verification You have a proven track record in developing high-level verification environments using System Verilog/UVM...
Gross/year: ₹ 11 lakhs
30+ days ago in MonsterReport -
Verification Engineer
Angel and Genie Bangalore, Karnataka
...Verilog, specman-e etc from scratch Good experience in Functional coverage, assertions coding Good experience in code and functional coverage closure...
29 days ago in JobrapidoReport -
VLSI Backend Services Practice Head
Tata Consultancy Services Bangalore, Karnataka
...Verilog and standard design formats (LEF, DEF, SPEF, etc) Good-to-Have Proficiency in scripting languages like Python, Perl, or Tcl for automation purposes...
15 days ago in JobrapidoReport -
Design Verification Engineer
M/s Angel and Genie Bangalore, Karnataka
...Verilog, specman-e etc from scratch experience in Functional coverage, assertions coding experience in code and functional coverage closure programming and...
28 days ago in JobrapidoReport -
Design Verification Manager
new UST Bangalore, Karnataka
Hi All, JD for Design Verification Lead: Good understanding of verification concepts and techniques. Very good knowledge of Verilog/System Verilog and UVM...
16 h 17 minutes ago in Talent.comReport -
Verification Engineering Manager
Texas Instruments Bangalore, Karnataka
...Cadence Xcelium, Cadence Vmanager) and modelling tools (e... Verilog/System Verilog, UVM, SVA) Ability to use programming languages (PERL, TCL, Python) to
4 days ago in Talent.comReport -
ASIC IP Verification Manager
Confidential Bangalore, Karnataka
...a deep understanding of ASIC design and verification You have a proven track record in developing high-level verification environments using System Verilog/UVM...
Gross/year: ₹ 11 lakhs
30+ days ago in Monster India PREMIUMReport -
Senior Engineer / Lead Engineer - FPGA
tejas networks Bangalore, Karnataka
Requirement: Reports to: Manager / Senior Manager. FPGA Experience: 3-10 Years Roles and Responsibilities: You will be engaged in end-to-end system...
6 days ago in Talent.comReport -
Staff / Principal Engineer - FPGA
new tejas networks Bangalore, Karnataka
Requirement: Reports to: General Manager / Associate VP Experience: 10 – 18 Years Roles and Responsibilities: You will be engaged in end-to-end system...
9 h 2 minutes ago in Talent.comReport -
FPGA IP Verification Manager
Confidential Bangalore, Karnataka
...Verilog, and constrained random verification methodologies. Strong background in simulation tools such as ModelSim, Questa, VCS, or similar EDA simulators...
30+ days ago in MonsterReport -
VLSI Sales Head
new Tata Consultancy Services Bangalore, Karnataka
...manager SoW and MSA reviews. Current location: Preferred Location: Total Exp: Relevant Exp: Current Organization: Current CTC: Expected CTC: Highest...
8 h 51 minutes ago in Talent.comReport -
DynPro - Design Verification Engineer
Dynproindia Bangalore, Karnataka
...Automate verification environment to handle multiple design configurations. Report verification metrics/status as defined by verification lead/manager...
3 days ago in Talent.comReport -
Deputy Manager- Embedded FPGA Design Team Lead
Confidential Bangalore, Karnataka
...managing conflicting priorities and cross functional teams to successfully implement complex projects. Grade & Pay Scale. Deputy Manager: E3. Rs 80000.220000
Gross/year: ₹ 24 lakhs
30+ days ago in Monster India PREMIUMReport -
NVM Analog Circuitry Leader
Texas Instruments Bangalore, Karnataka
We are seeking a highly skilled and experienced Analog Design Manager to lead and drive the development of cutting-edge analog and mixed-signal circuits for...
4 days ago in Talent.comReport -
Pre-Silicon Verification Specialist
new M/s Angel and Genie Bangalore, Karnataka
...Verilog, specman-e etc from scratch experience in Functional coverage, assertions coding experience in code and functional coverage closure programming and...
1 day ago in Talent.comReport -
CPU DV/Performance Manager/Lead
Confidential Bangalore, Karnataka
...computer architecture with relevant research and project work or industry experience Strong programming skills (C/C+ and assembly) Basic knowledge of Verilog
Gross/year: ₹ 11 lakhs
30+ days ago in MonsterReport -
CPU DV/Performance Manager/Lead
Confidential Bangalore, Karnataka
...knowledge of Verilog. ACADEMIC CREDENTIALS: Bachelor's/Master's in Computer Science/Electrical/Electronics Engineering with relevant course and research work.
Gross/year: ₹ 11 lakhs
30+ days ago in MonsterReport -
Senior Manager, VLSI Design Engineering
Confidential Bangalore, Karnataka
...Verilog Assertions Debug failures and root-cause it by interacting with other teams/groups Etc. Define and implement verification strategies, test plans...
30+ days ago in MonsterReport -
Sykatiya Technologies - Lead Design Verification...
Sykatiya Technology Bangalore, Karnataka +1 Location
...and enable complex feature verification suites... Architect and Develop block level verification environments for sub-system and fullchip using System Verilog...
22 days ago in Talent.comReport
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