Verilog manager job offers in bangalore, karnataka
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Sr Design Verification Engineering Manager
Cadence Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
30+ days ago in MonsterReport -
Solutions Engineering, Sr Engineer
Synopsys Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 2+ years of relevant industry experience/ M. Tech. in...
30+ days ago in MonsterReport -
Solutions Engineering, Staff Engineer
Synopsys Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 4+ years of relevant industry experience/ M. Tech...
30+ days ago in MonsterReport -
Solutions Engineering, Sr Engineer
Sypnosys Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 2+ years of relevant industry experience/ M. Tech. in...
30+ days ago in MonsterReport -
Solutions Engineering, Staff Engineer
Synopsys India Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 4+ years of relevant industry experience/ M. Tech...
22 days ago in MonsterReport -
Tech Lead â? Embedded PCIe Specialist
INNOPHASE Bangalore, Karnataka
...with Xilinx Zynq platform, Vivado Tools (10G Ethernet IP). Understanding of FPGA HDL (VHDL, Verilog, System Verilog) and/or fpga pl/rtl. Experienced in RTOS
30+ days ago in MonsterReport -
Solutions Engineering, Staff Engineer
Sypnosys Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 4+ years of relevant industry experience/ M. Tech...
30+ days ago in MonsterReport -
Lead MTS Verification Engineering
Rambus Bangalore, Karnataka
...the world to develop products that make data faster and safer. As a Lead MTS Verification Engineer, the candidate will be reporting to the Verification Manager...
21 days ago in MonsterReport -
Solutions Engineering, Sr Engineer
Synopsys India Bangalore, Karnataka
...Manager, TetraMAX ATPG and Diagnosis is an added advantage Academic Qualification: B. E / b.Tech with 2+ years of relevant industry experience/ M. Tech. in...
22 days ago in MonsterReport -
A&MS Circuit Design Engr, Sr I
Synopsys Bangalore, Karnataka
...Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages...
30+ days ago in MonsterReport -
Smts cad engineer
Rambus Chip Technologies Bangalore, Karnataka
As a SMTS CAD Engineer, the candidate will be reporting to the Sr Manager CAD and is a Full Time position In this role the candidate will be working and...
30+ days ago in MonsterReport -
Verification Lead/Manager E045
new Prodapt Bangalore, Karnataka
Prodapt is looking for a Verification Lead/ Manager with hands-on experience in VLSI front end Verification Experience in developing the TB for verification...
1 day ago in Kitjob_inReport -
(J-521) - Manager - ASIC Verification
Micron Bangalore, Karnataka
...Verilog and UVM Methodology. The position requires good Written & Verbal Communication Skills. Strong Commitment and ability to work in Cross Functional &...
8 days ago in Kitjob_inReport -
(KU-512) | Sr Manager, Analog Engineering
renesas electronics Bangalore, Karnataka
...analog and mixed signal blocks. Experience in AMS Verification of Transceivers and sub-blocks. Experience in Leading a team or can manager a Team of engineers.
2 days ago in Kitjob_inReport -
Sr Design Verification Engineering Manager - [W-860]
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
4 days ago in Kitjob_inReport -
Sr Design Verification Engineering Manager QCD-703
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
6 days ago in Kitjob_inReport -
Sr Design Verification Engineering Manager BLI477
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
5 days ago in Kitjob_inReport -
Sr Design Verification Engineering Manager - (YT74)
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
6 days ago in Kitjob_inReport -
(VRF-768) - Senior Manager, ASIC CAD
Micron Bangalore, Karnataka
...Verilog Generators, and Low Power design. Preferred experience in AI/ML flows and implementationStrong Leadership and communication skills and drive towards...
8 days ago in Kitjob_inReport -
[W-769] | Senior Manager, ASIC CAD
Micron Bangalore, Karnataka
...Verilog Generators, and Low Power design. Preferred experience in AI/ML flows and implementationStrong Leadership and communication skills and drive towards...
5 days ago in Kitjob_inReport -
(Y-349) - Sr Design Verification Engineering Manager
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
2 days ago in Kitjob_inReport -
OJ994 Sr Design Verification Engineering Manager
cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology. Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
7 days ago in Kitjob_inReport -
[FDD-00] | Sr Design Verification Engineering Manager
new cadence design systems Bangalore, Karnataka
...Verilog, HVL(SV, e) with UVM/OVM/eRM methodology Experience in assertions development/closure, constraint randomization, functional coverage, code coverage...
1 day ago in Kitjob_inReport -
PSI024 RTL Logic Design - Architect - SoC RTL Design...
new Samsung Electronics Bangalore, Karnataka
RTL IP Design/Micro Architecture/Design Architect Manager/Lead This position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India...
1 day ago in Kitjob_inReport -
QJL-226 - RTL Logic Design - Architect - SoC RTL Design...
Samsung Electronics Bangalore, Karnataka
RTL IP Design/Micro Architecture/Design Architect Manager/Lead This position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India...
7 days ago in Kitjob_inReport
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